<?xml version="1.0"?>
<target>
  <architecture>csky</architecture>
  <feature name="org.gnu.csky.abiv2.gpr">
    <reg name="r0"  bitsize="32" regnum="0"  group="gpr"/>
    <reg name="r1"  bitsize="32" regnum="1"  group="gpr"/>
    <reg name="r2"  bitsize="32" regnum="2"  group="gpr"/>
    <reg name="r3"  bitsize="32" regnum="3"  group="gpr"/>
    <reg name="r4"  bitsize="32" regnum="4"  group="gpr"/>
    <reg name="r5"  bitsize="32" regnum="5"  group="gpr"/>
    <reg name="r6"  bitsize="32" regnum="6"  group="gpr"/>
    <reg name="r7"  bitsize="32" regnum="7"  group="gpr"/>
    <reg name="r8"  bitsize="32" regnum="8"  group="gpr"/>
    <reg name="r9"  bitsize="32" regnum="9"  group="gpr"/>
    <reg name="r10" bitsize="32" regnum="10" group="gpr"/>
    <reg name="r11" bitsize="32" regnum="11" group="gpr"/>
    <reg name="r12" bitsize="32" regnum="12" group="gpr"/>
    <reg name="r13" bitsize="32" regnum="13" group="gpr"/>
    <reg name="r14" bitsize="32" regnum="14" group="gpr"/>
    <reg name="r15" bitsize="32" regnum="15" group="gpr"/>
    <reg name="r16" bitsize="32" regnum="16" group="gpr"/>
    <reg name="r17" bitsize="32" regnum="17" group="gpr"/>
    <reg name="r18" bitsize="32" regnum="18" group="gpr"/>
    <reg name="r19" bitsize="32" regnum="19" group="gpr"/>
    <reg name="r20" bitsize="32" regnum="20" group="gpr"/>
    <reg name="r21" bitsize="32" regnum="21" group="gpr"/>
    <reg name="r22" bitsize="32" regnum="22" group="gpr"/>
    <reg name="r23" bitsize="32" regnum="23" group="gpr"/>
    <reg name="r24" bitsize="32" regnum="24" group="gpr"/>
    <reg name="r25" bitsize="32" regnum="25" group="gpr"/>
    <reg name="r26" bitsize="32" regnum="26" group="gpr"/>
    <reg name="r27" bitsize="32" regnum="27" group="gpr"/>
    <reg name="r28" bitsize="32" regnum="28" group="gpr"/>
    <reg name="r29" bitsize="32" regnum="29" group="gpr"/>
    <reg name="r30" bitsize="32" regnum="30" group="gpr"/>
    <reg name="r31" bitsize="32" regnum="31" group="gpr"/>
    <reg name="hi"  bitsize="32" regnum="36"/>
    <reg name="lo"  bitsize="32" regnum="37"/>
    <reg name="pc"  bitsize="32" regnum="72"/>
  </feature>
  <feature name="org.gnu.csky.abiv2.fpu">
	<vector id="v4f" type="ieee_single" count="4"/>
    <vector id="v2d" type="ieee_double" count="2"/>
    <vector id="v16i8" type="int8" count="16"/>
    <vector id="v8i16" type="int16" count="8"/>
    <vector id="v4i32" type="int32" count="4"/>
    <vector id="v2i64" type="int64" count="2"/>
    <union id="vec128">
      <field name="v4_float" type="v4f"/>
      <field name="v2_double" type="v2d"/>
      <field name="v16_int8" type="v16i8"/>
      <field name="v8_int16" type="v8i16"/>
      <field name="v4_int32" type="v4i32"/>
      <field name="v2_int64" type="v2i64"/>
      <field name="uint128" type="uint128"/>
    </union>
	<union id="float64_union">
      <field name="double64" type="ieee_double"/>
	  <field name="float32" type="ieee_single"/>
	  <field name="uint64" type="uint64"/>
    </union>
    <!--float register-->
    <reg name="fr0"  bitsize="64" regnum="40" type="float64_union" group="fpu"/>
    <reg name="fr1"  bitsize="64" regnum="41" type="float64_union" group="fpu"/>
    <reg name="fr2"  bitsize="64" regnum="42" type="float64_union" group="fpu"/>
    <reg name="fr3"  bitsize="64" regnum="43" type="float64_union" group="fpu"/>
    <reg name="fr4"  bitsize="64" regnum="44" type="float64_union" group="fpu"/>
    <reg name="fr5"  bitsize="64" regnum="45" type="float64_union" group="fpu"/>
    <reg name="fr6"  bitsize="64" regnum="46" type="float64_union" group="fpu"/>
    <reg name="fr7"  bitsize="64" regnum="47" type="float64_union" group="fpu"/>
    <reg name="fr8"  bitsize="64" regnum="48" type="float64_union" group="fpu"/>
    <reg name="fr9"  bitsize="64" regnum="49" type="float64_union" group="fpu"/>
    <reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
    <reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
    <reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
    <reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
    <reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
    <reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
    <!--vector register-->
    <reg name="vr0"  bitsize="128" regnum="56" group="vpu"  type="vec128"/>
    <reg name="vr1"  bitsize="128" regnum="57" group="vpu"  type="vec128"/>
    <reg name="vr2"  bitsize="128" regnum="58" group="vpu"  type="vec128"/>
    <reg name="vr3"  bitsize="128" regnum="59" group="vpu"  type="vec128"/>
    <reg name="vr4"  bitsize="128" regnum="60" group="vpu"  type="vec128"/>
    <reg name="vr5"  bitsize="128" regnum="61" group="vpu"  type="vec128"/>
    <reg name="vr6"  bitsize="128" regnum="62" group="vpu"  type="vec128"/>
    <reg name="vr7"  bitsize="128" regnum="63" group="vpu"  type="vec128"/>
    <reg name="vr8"  bitsize="128" regnum="64" group="vpu"  type="vec128"/>
    <reg name="vr9"  bitsize="128" regnum="65" group="vpu"  type="vec128"/>
    <reg name="vr10" bitsize="128" regnum="66" group="vpu"  type="vec128"/>
    <reg name="vr11" bitsize="128" regnum="67" group="vpu"  type="vec128"/>
    <reg name="vr12" bitsize="128" regnum="68" group="vpu"  type="vec128"/>
    <reg name="vr13" bitsize="128" regnum="69" group="vpu"  type="vec128"/>
    <reg name="vr14" bitsize="128" regnum="70" group="vpu"  type="vec128"/>
    <reg name="vr15" bitsize="128" regnum="71" group="vpu"  type="vec128"/>
  </feature>
  <feature name="org.gnu.csky.abiv2.cr">
    <flags id="ckcpu_psr" size="4">
      <field name="C[0]"        start="0"  end="0"  type="int8"/>
      <field name="AF[1]"       start="1"  end="1"  type="int8"/>
      <field name="FE[4]"       start="4"  end="4"  type="int8"/>
      <field name="IE[6]"       start="6"  end="6"  type="int8"/>
      <field name="IC[7]"       start="7"  end="7"  type="int8"/>
      <field name="EE[8]"       start="8"  end="8"  type="int8"/>
      <field name="MM[9]"       start="9"  end="9"  type="int8"/>
      <field name="TE[12]"      start="12" end="12" type="int8"/>
      <field name="TM[15:14]"   start="14" end="15" type="int8"/>
      <field name="VEC[23:16]"  start="16" end="23" type="int8"/>
      <field name="S[31]"       start="31" end="31" type="int8"/>
    </flags>
    <reg name="psr"  bitsize="32" regnum="89"  group="cr" type="ckcpu_psr"/>
    <reg name="vbr"  bitsize="32" regnum="90"  group="cr"/>
    <reg name="epsr" bitsize="32" regnum="91"  group="cr"/>
    <reg name="fpsr" bitsize="32" regnum="92"  group="cr"/>
    <reg name="epc"  bitsize="32" regnum="93"  group="cr"/>
    <reg name="fpc"  bitsize="32" regnum="94"  group="cr"/>
    <reg name="ss0"  bitsize="32" regnum="95"  group="cr"/>
    <reg name="ss1"  bitsize="32" regnum="96"  group="cr"/>
    <reg name="ss2"  bitsize="32" regnum="97"  group="cr"/>
    <reg name="ss3"  bitsize="32" regnum="98"  group="cr"/>
    <reg name="ss4"  bitsize="32" regnum="99"  group="cr"/>
    <reg name="gcr"  bitsize="32" regnum="100" group="cr"/>
    <reg name="gsr"  bitsize="32" regnum="101" group="cr"/>
    <reg name="cr13" bitsize="32" regnum="102" group="cr"/>
    <reg name="cr14" bitsize="32" regnum="103" group="cr"/>
    <reg name="cr15" bitsize="32" regnum="104" group="cr"/>
    <reg name="cr16" bitsize="32" regnum="105" group="cr"/>
    <reg name="cr17" bitsize="32" regnum="106" group="cr"/>
    <reg name="cr18" bitsize="32" regnum="107" group="cr"/>
    <reg name="cr19" bitsize="32" regnum="108" group="cr"/>
    <reg name="cr20" bitsize="32" regnum="109" group="cr"/>
    <reg name="cr21" bitsize="32" regnum="110" group="cr"/>
    <reg name="cr22" bitsize="32" regnum="111" group="cr"/>
    <reg name="cr23" bitsize="32" regnum="112" group="cr"/>
    <reg name="cr24" bitsize="32" regnum="113" group="cr"/>
    <reg name="cr25" bitsize="32" regnum="114" group="cr"/>
    <reg name="cr26" bitsize="32" regnum="115" group="cr"/>
    <reg name="cr27" bitsize="32" regnum="116" group="cr"/>
    <reg name="cr28" bitsize="32" regnum="117" group="cr"/>
    <reg name="cr29" bitsize="32" regnum="118" group="cr"/>
    <reg name="cr30" bitsize="32" regnum="119" group="cr"/>
    <reg name="cr31" bitsize="32" regnum="120" group="cr"/>
  </feature>
  <feature name="org.gnu.csky.abiv2.fvcr">    
    <reg name="fcr"  bitsize="32" regnum="121" group="fvcr"/>
    <reg name="fid"  bitsize="32" regnum="122" group="fvcr"/>
    <reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
    <!--usp cr_bank1-->
    <reg name="usp"  bitsize="32" regnum="127"/>
  </feature>
  <feature name="org.gnu.csky.abiv2.mmu">
    <flags id="ckcpu_mir" size="4">
      <field name="Index[9:0]" start="0"  end="9"  type="int16"/>
      <field name="TF[30]"     start="30" end="30" type="int8"/>
      <field name="P[31]"      start="31" end="31" type="int8"/>
    </flags>
    <flags id="ckcpu_mel" size="4">
      <field name="V[1]"        start="1"  end="1"  type="int8"/>
      <field name="D[2]"        start="2"  end="2"  type="int8"/>
      <field name="C[3]"        start="3"  end="3"  type="int8"/>
      <field name="SEC[4]"      start="4"  end="4"  type="int8"/>
      <field name="SO[5]"       start="5"  end="5"  type="int8"/>
      <field name="B[6]"        start="6"  end="6"  type="int8"/>
      <field name="PFN[31:12]"  start="12" end="31" type="int32"/>
    </flags>
    <flags id="ckcpu_meh" size="4">
      <field name="ASID[7:0]"   start="0"  end="7"  type="int8"/>
      <field name="VPN[31:12]"  start="12" end="31" type="int32"/>
    </flags>
    <flags id="ckcpu_mpr" size="4">
      <field name="PageMask[24:13]" start="13" end="24" type="int16"/>
    </flags>
    <flags id="ckcpu_mcir" size="4">
      <field name="ASID[7:0]"       start="0"  end="7"  type="int8"/>
      <field name="TLBINV_ALL[26]"  start="26" end="26" type="int8"/>
      <field name="TLBINV[27]"      start="27" end="27" type="int8"/>
      <field name="TLBWR[28]"       start="28" end="28" type="int8"/>
      <field name="TLBWI[29]"       start="29" end="29" type="int8"/>
      <field name="TLBR[30]"        start="30" end="30" type="int8"/>
      <field name="TLBP[31]"        start="31" end="31" type="int8"/>
    </flags>
    <flags id="ckcpu_mpgd" size="4">
      <field name="HRE[0]"      start="0"  end="0"  type="int8"/>
      <field name="PBA[31:12]"  start="12" end="31" type="int32"/>
    </flags>
    <flags id="ckcpu_msa" size="4">
      <field name="V[1]"       start="1"  end="1"  type="int8"/>
      <field name="D[2]"       start="2"  end="2"  type="int8"/>
      <field name="C[3]"       start="3"  end="3"  type="int8"/>
      <field name="SEC[4]"     start="4"  end="4"  type="int8"/>
      <field name="SO[5]"      start="5"  end="5"  type="int8"/>
      <field name="B[6]"       start="6"  end="6"  type="int8"/>
      <field name="BA[31:29]"  start="29" end="31" type="int8"/>
    </flags>
    <reg name="mir"  bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
    <reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
    <reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
    <reg name="meh"  bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
    <reg name="mpr"  bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
    <reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
    <reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
    <reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
    <reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
  </feature>
  <feature name="org.gnu.csky.abiv2.bank1">
    <reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
    <reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
    <reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
    <reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
    <reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
  </feature>
</target>
